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PM RESEARCH MEMO

Title: High Bandwidth Flash (HBF): A Capacity Tier Beside HBM for Read-Mostly Inference Data. Sandisk and SK hynix Standardizing, Samples ~Late 2027, HVM 2029 "If All Goes Well," and Optane as the Cautionary Template Author / source: Jon Y (Asianometry), solo narration Source title: High Bandwidth Flash Is Coming Source URL: https://www.youtube.com/watch?v=3nTpW52nioI Video ID: 3nTpW52nioI Published: 2026-09-24 (upload) Duration: 20:53 Memo date: Sunday, September 27, 2026 (America/Toronto) Transcript paths: /workspace/youtube-transcripts/3nTpW52nioI.md · 3nTpW52nioI_plain.txt · Brief: 3nTpW52nioI_brief.md Caption quality: Creator-uploaded manual English captions (manual-en.json3), near-verbatim to the script, with section headers. This isn't ASR, so name and number rendering is reliable as narrated. The only oddities are deliberate script jokes ("defill and precode," "the state of Montana"). Spec numbers are as narrated and not independently verified (External check needed). Source / conflict flags: Jon says the video idea was suggested by a Sandisk employee who "walked with me to Hot Chips across the Stanford lawn" (19:30–20:00). Sandisk is the lead HBF proponent, so treat the framing as potentially Sandisk-influenced, even though the video includes skeptical material (Optane, "HBF Sucks?", Agrawal & Giduthuri). The SemiAnalysis Q&A quote is relayed "via Irrational [Analysis]," and Jon says "I was there to confirm it happened." Irrational Analysis is described as a "good friend of the show." Product: Memory-hierarchy / semis research map. Not investment advice. No buy/sell recommendations. Source discipline: This transcript is the only primary source. The brief was corrected where it disagrees (Appendix B). The earlier Asianometry memo (2026-09-14-asianometry-silicon-valley-starving-compute.md) is cross-referenced as other desk memo, and no figures are imported. No market data was fetched. Live marks come only from TradingView/IBKR read-only, and none were pulled. The video names no stock prices, valuations or earnings, so every equity implication below is my inference.

Name locks (clean captions; for reference): Sandisk (SNDK); SK hynix; Samsung ("zNAND-O"); Micron (MU); Intel (Optane / 3D XPoint); Google; Tenstorrent; Open Compute Project (OCP); David Patterson; Raja Koduri; Pat Gelsinger; Kim Ho-sik (SK hynix VP); Alper Ilkbahar (Sandisk EVP & CTO, ex-VP/GM Intel Optane Group); A. Agrawal & R. Giduthuri (Hot Chips 2026 presenters); Koji Sakui & Takayuki Ohba (Honda Research Institute Japan, 2019); SemiAnalysis (unnamed analyst); Irrational Analysis; Peking University / Fudan ("HBF Sucks?").

Stance one-liner (source-locked): Inference is memory-bound (decode), and both model weights (Kimi K3 ~2.8TB at 8-bit) and KV caches (long-running agents, ~1M-token contexts) are exploding. HBM hits a capacity-vs-bandwidth-per-GB wall (TSV-limited). HBF stacks NAND like HBM stacks DRAM, giving ~8–16x the capacity per stack (~512GB vs. ~36GB HBM4) at comparable headline bandwidth, but with ~two orders of magnitude slower read/program, limited endurance and more power. It fits read-mostly data (weights; maybe shared KV/prompts; MoE experts) and needs heavy software work. The timeline is samples ~late 2027, HVM 2029 if all goes well. "Not something coming anytime soon, but it will come sooner than you think."

Overall conviction: High that the technical framing is accurate (clean source, multiple independent skeptic inputs). Med that HBF reaches HVM roughly on schedule (standardization momentum: SK hynix MoU, OCP v0.7.0, Google/Tenstorrent. Against it: the Optane precedent and software dependence). Low on any 2026–27 P&L impact for memory names. The earliest material revenue is 2029+ (inference).


EXECUTIVE SUMMARY


SOURCE-ACCURATE SUMMARY

Chronological. Timestamps are ~30s caption blocks. Quotes are ≤20 words. Single narrator.

  1. (00:00–00:30) Hook. Before Hot Chips, Jon had never heard of "decode," "prefill," or "KV Cache," and now sees them everywhere. They "relate to major technical challenges associated with serving these ever-growing models."
  2. (00:30–01:00) Framing. Memory makers, "flush off the HBM bonanza," bring "High Bandwidth Flash or HBF… a potential challenger and/or companion to HBM."
  3. (01:00–02:30) Prefill and KV cache. Prefill processes all inputs in parallel and produces Q, K and V vectors. "Prefill gives you a KV Cache of the inputs." Decode then emits "tokens one at a time," and each new token's K/V is inserted.
  4. (02:30–03:00) Regimes. KV cache is "the model's working notes." Prefill is "bound by how much compute." Decode "is more memory bound… logic circuits waste their time waiting."
  5. (03:00–03:30) Weights. "Kimi K3 has 2.8 trillion total parameters… about 2.8 terabytes," versus K2.7 ~1TB and DeepSeek V3 671GB.
  6. (03:30–04:30) KV caches and agents. Long-running agents with long chains of thought make "KV Caches get absolutely massive." Context is "about 1 million tokens" (~1,500–3,000 pages; audio 11–12 hours; video "an hour at HD"). Mitigations: compaction (blurry "like compressing a JPG") and "sending certain less-frequently read blocks to SSDs." Frequently read blocks "must stay in the HBM."
  7. (04:30–05:30) HBM. "The thing that turned all of Korea into degenerate semiconductor stock traders." A logic base die plus 4/8/12/16 core dies, with TSVs through the center. "HBM remains a money-maker," but "HBM might not be the proper memory architecture for AI's future." Irrational Analysis: HBM "is a mistake."
  8. (05:30–06:30) Hot Chips Q&A. The memory session (Micron, Samsung, SK hynix) was "nearly full attendance." The SemiAnalysis analyst: "about 20 terabytes per square centimeter at the cell level… maybe… 4 terabytes per square centimeter in a stack of 20… diluted the throughput enormously."
  9. (06:30–07:00) The trade-off. "You cannot get the additional gigabytes… without reducing bandwidth per gigabyte," because TSVs are limited. "The price of incremental capacity and bandwidth [has risen]." Tall stacks could make "each core die… slower than plain old commodity memory."
  10. (07:00–07:30) Gelsinger and hynix. Gelsinger: HBM is "lousy memory." Kim Ho-sik "partly agreed… not the final answer to the Memory Wall," but "the best thing on the market right now," and "SK hynix is working on other solutions."
  11. (07:30–08:30) HBF defined. "Stacks and connects flash dies in the same way as HBM stacks… DRAM dies." It's distinct from monolithic 3D NAND. "8-16 times (512 gigabytes compared to 36 or so gigabytes per HBM4 stack)." Bandwidth "can theoretically go higher."
  12. (08:30–09:00) Bandwidth. "Up to 3 terabytes per second effectively," higher than "HBM3E's 1.2" and "comparable to Micron and Samsung's HBM4." "Adjusted for capacity, HBF's bandwidth numbers are far smaller."
  13. (09:00–09:30) Latency. Read/program are "roughly two orders of magnitude" slower, and programming is slower than reading. Optimizing latency sacrifices "data retention or cost-per-bit." "This gap is fundamental."
  14. (09:30–10:00) Endurance and power. "Several thousands of cycles" versus DRAM's "essentially… no endurance limit." "More power to drive these large HBF cubes… more heat… throttle."
  15. (10:00–11:00) History. The 2019 IEEE 3DIC paper by Sakui & Ohba (Honda Research Institute Japan), "High Bandwidth NAND," using bump-less TSV. Sandisk introduced HBF at "Future FWD investor day in February 2025," "with inputs from major AI players." First patent application in May 2024.
  16. (11:00–12:30) Ecosystem. Technical Advisory Board in July 2025 (Patterson, Koduri). MoU with SK hynix in August 2025 "to standardize the spec." The spec covers the interface, not internals, so competitors can cooperate and compete, and it gives "a credible second source." Google and Tenstorrent joined the consortium (Patterson is a Google fellow).
  17. (12:30–13:00) Spec and Samsung. "In August 2026, the Open Compute Project released the first public version 0.7.0 spec." Samsung's "zNAND-O… looks similar to HBF, but we shall see."
  18. (13:00–14:00) Hierarchy. Tier 0 is SRAM, Tier 1 HBM, Tier 2 system DRAM. Sandisk pitches HBF "side by side with HBM at the Tier 1 level," with HBM "hot" and HBF "warmer."
  19. (14:00–15:00) Shoreline math. The interposer "only has the shoreline for a certain number of memory chips." 8× 24GB HBM is ~192GB, while "six HBFs and two HBMs… 3.12 terabytes." Data must be "read-mostly." "Most people believe this will be the model's weights… some have suggested KV Cache too."
  20. (15:00–16:00) Caveats. Agrawal & Giduthuri (Hot Chips 2026): "just because HBF has cheap memory capacity does not one-to-one mean cheaper tokens." It "will require extensive software support." Peking/Fudan "HBF Sucks?": "no drop-in for SSDs." Software must choose data (e.g., "shared prompts").
  21. (16:00–16:30) MoE fit. MoE "needs the capacity to hold all the experts, but only reads a few… lower bandwidth per gigabyte… acceptable."
  22. (16:30–18:30) Optane. 3D XPoint = PCM. Intel and Micron announced it in 2015, with DRAM-like speeds and a mid price and a "warm data" pitch that "required software support." "The rise of 3D NAND drove down flash's cost-per-bit… invalidated much of Optane's economic justification." "Micron then dropped out… Intel as the sole vendor… it was over."
  23. (18:30–19:30) CTO and lessons. Alper Ilkbahar "spent five years at Intel as VP and General Manager of the Intel Optane Group." "Considering the DRAM shortage today," some say Intel should have held on. An insider: "Optane just couldn't do what Intel claimed." But the "PCM cells worked brilliantly," and "the controller and go-to market strategy… failed."
  24. (19:30–20:00) Disclosure. "A special Sandisk employee who suggested this idea… walk[ed] with me to Hot Chips."
  25. (20:00–20:53) Schedule and open questions. Sandisk at SEMICON Taiwan: "proof-of-concept or engineering samples in like late 2027… if all goes well, high volume manufacture starts in 2029." "Not something coming anytime soon, but it will come sooner than you think." Open questions: delivery on time? Delays? What is it good for? Will software vendors cooperate?

SYSTEMS MAP / VALUE CHAIN ANALYSIS

A. Demand node: inference workloads (Source). Model weights (TB-scale, e.g., Kimi K3 ~2.8TB) + KV caches (agents, ~1M-token contexts) → memory-bound decode → accelerators stall on memory. Inference: Agentic inference intensity is the root driver. It's the same thesis as the Sep 14 memo's "long-running agents/agent swarms" (other desk memo).

B. Current memory hierarchy (Source). Tier 0 SRAM (on-die) → Tier 1 HBM (interposer shoreline; TSV-limited bandwidth per GB) → Tier 2 system DRAM → SSD (KV offload, capacity). Inference: The interposer shoreline is the scarce real estate. Every slot is a zero-sum choice among HBM, HBF and future options.

C. HBF supply chain (Source + Inference). NAND die (Sandisk, SK hynix; Samsung zNAND-O) → TSV stacking and advanced packaging (inference: OSAT/foundry packaging content) → controller/base logic (the Optane failure point) → OCP spec (interface standard, second source) → accelerator integration (Google TPU and Tenstorrent in the consortium; GPU vendors implied, not named) → software stack (data placement, schedulers, MoE-aware serving).

D. Economics node (Source → Inference). The HBM incremental cost of capacity and bandwidth is rising (Source). HBF gives cheap capacity, but cheap capacity doesn't equal cheap tokens if accelerators wait (Source). Inference: The HBF value proposition is $/token for capacity-bound, bandwidth-tolerant workloads (MoE experts, weights, shared prompts). It isn't a general-purpose HBM replacement. The 3D NAND cost curve helps here (it was Optane's killer, and it's HBF's tailwind).

E. Competitive node (Source). SK hynix hedges HBM with HBF, Samsung has zNAND-O, and Micron isn't named (it's the HBM comparator and Optane exiter). Intel is out (Optane). Inference: HBF success moves mix within memory vendors more than it moves share across them, except where a vendor lacks HBF (External: Micron).

F. Risk / execution node (Source). Latency (~100x), endurance (thousands of cycles), power and thermal, software dependence, controller quality, go-to-market, schedule ("if all goes well"). The Optane precedent and the CTO's Optane history.

G. Source-influence layer. The idea was suggested by a Sandisk employee, Irrational Analysis is a friend of the show, and SemiAnalysis is quoted through Irrational (Jon was present). The skeptical inputs are independent (Agrawal & Giduthuri; Peking/Fudan; the Optane software insider).


SECOND AND THIRD-ORDER EFFECTS

Chain 1: Exploding KV caches → SSD offload today → enterprise SSD/NAND demand before HBF exists (Source → Inference). 1st: Agents inflate KV caches (Source). 2nd: Less-read KV blocks get offloaded to SSDs (Source). 3rd (Inference): 2026–27 NAND demand uplift from inference storage tiers is a channel independent of HBF, and a nearer-dated positive for NAND suppliers. Confirm: enterprise SSD bit growth tied to inference, inference-serving software adopting KV offload (External). Disconfirm: compaction or architectural changes shrink KV footprint.

Chain 2: HBM taller stacks → diluted bandwidth per GB → rising incremental cost → HBF as a pressure valve (Source → Inference). 1st: TSV limits mean capacity costs bandwidth per GB (Source). 2nd: The industry openly questions HBM's trajectory (Gelsinger, SemiAnalysis, the hynix VP) (Source). 3rd (Inference): HBF puts a long-dated ceiling on HBM pricing power for capacity-driven use cases from ~2029, while HBM keeps hot-data pricing power. The desk read is a gradual narrative shift, not a cliff. Disconfirm: HBM4/HBM4E+ architectures (e.g., wider interfaces, hybrid bonding) fix bandwidth per GB, and HBF becomes a niche.

Chain 3: Standardization + second source → avoid the Optane single-vendor death → broader adoption odds (Source → Inference). 1st: Sandisk–SK hynix MoU, OCP v0.7.0, Google/Tenstorrent (Source). 2nd: Buyers get a credible second source (Source). 3rd (Inference): Adoption probability rises versus Optane's path. But standard interfaces commoditize HBF, so vendor margins could compress relative to HBM's scarcity economics. The winners may be volume NAND vendors with packaging scale. Watch: spec v1.0, the number of consortium members, Samsung joining versus forking (zNAND-O) (External).

Chain 4: Software gating → MoE and data-placement stacks decide HBF's value → the software ecosystem becomes the kingmaker (Source → Inference). 1st: "Extensive software support" is required, and HBF is no drop-in (Source). 2nd: MoE and shared-prompt workloads fit best (Source). 3rd (Inference): Inference-serving frameworks and hyperscaler in-house stacks determine the adoption pace, so Google (consortium member, TPU) is a likely first mover and merchant GPU adoption is less certain. Disconfirm: no major serving stack adds HBF-aware placement by 2028.

Chain 5: Compute glut risk in H2'27 (Sep 14 memo) × HBF sampling in late 2027 → adoption decision under cost pressure (Cross-memo inference). 1st: The Sep 14 memo's H2'27 shortage-to-glut tip (other desk memo). 2nd: HBF samples reach customers in late 2027 (Source). 3rd (Inference): A glut raises the focus on $/token efficiency (a potential HBF tailwind) but cuts new-architecture capex appetite (a headwind). Net: adoption variance widens. Watch: capex guidance in 2027, customer PoC counts.


SCENARIO FRAMEWORK

Horizons: near is now to end-2027 (spec and samples). Medium is 2028–2030 (HVM and ramp). Probabilities are my inference; the video gives none.

Bull (~25%)

Assumptions: Samples arrive on time in late 2027 and HVM in 2029. Google TPU and at least one merchant accelerator roadmap adopt HBF. MoE-heavy frontier models dominate. Serving stacks add HBF-aware placement. Endurance and power are acceptable for weights. Samsung converges on the standard. Winners (hypotheses): Sandisk (HBF proponent), SK hynix (hedged in both), NAND bit demand, advanced-packaging content (TSV stacking), inference-serving software. Losers: HBM capacity-tier pricing power at the margin (2029+), DRAM-only exposure without an HBF program (Micron status External). Leading indicators: Spec v1.0, customer PoC announcements, accelerator roadmaps citing HBF (External).

Base (~50%)

Assumptions: Schedule slips 6–18 months ("if all goes well" doesn't hold). HBF lands as a niche capacity tier for specific inference deployments (weights for MoE) at hyperscalers with in-house stacks. HBM stays dominant for hot data. The near-term NAND read is driven by KV-cache SSD offload, not HBF. Winners: NAND vendors via SSD offload (2026–27), HBM incumbents (little displacement before 2030). Losers: Aggressive "HBM is obsolete" narratives. Leading indicators: A slow cadence of spec revisions, limited merchant GPU commitments (External).

Bear (~25%)

Assumptions: It repeats Optane. Controller or software shortcomings, latency and endurance limit use cases, power and thermal constraints bind in dense racks, HBM4E+ closes the capacity gap, or DRAM/HBM cost curves undercut the economics. Samsung forks (zNAND-O) and fragments the standard. Winners: HBM incumbents' franchise, conventional SSD tiers. Losers: Sandisk's HBF optionality, the consortium narrative. Leading indicators: Sample delays, absent customer PoCs, more negative academic or industry benchmarks in the vein of "HBF Sucks?" (External).


COMPANY/ASSET WATCHLIST

Hypotheses, not tickets. The video gives no prices or valuations, so External check needed on all financial data.

Asset / sleeve Thesis link (Source) Metrics to watch Catalysts Risks / disconfirm
Sandisk (SNDK) HBF originator (patent May 2024; Feb 2025 investor day; SEMICON Taiwan roadmap); CTO ex-Optane GM HBF sample timing, customer PoCs, enterprise SSD (KV offload) mix Spec v1.0; late-2027 samples Optane repeat; schedule slip; source influence (a Sandisk employee suggested the video)
SK hynix HBM leader and HBF co-standardizer (MoU Aug 2025); VP "not the final answer" HBM vs. HBF roadmap commentary; HBM pricing Hot Chips / earnings commentary HBM narrative overhang; hedged
Samsung zNAND-O rival Standard convergence vs. fork Product disclosures Fragmentation
Micron (MU) HBM3E 1.2 TB/s comparator; Optane partner that exited; not named as HBF participant Any HBF/high-capacity tier program (External) — Absent from HBF ecosystem (if confirmed)
Google (TPU) HBF consortium member; Patterson link TPU memory roadmap TPU announcements In-house only
Tenstorrent (private) Consortium member Product roadmap — Scale
GPU/ASIC vendors (NVIDIA etc.; implied, not named) Shoreline allocation decision Roadmaps citing HBF GTC-type events Non-adoption
Advanced packaging / TSV (SMH-adjacent) HBF uses "advanced packaging voodoo" TSV stacking Packaging capacity, content per stack HBF ramp Timeline
Inference-serving software (IGV-adjacent) "Extensive software support" required; data placement HBF-aware features in serving stacks Framework releases Indirect
DRAM / SMH sleeves HBM "money-maker" now; long-dated narrative risk HBM ASPs, shoreline mix — Near-term: none
Enterprise SSD / NAND (near-term channel) KV-cache offload to SSDs Inference-driven SSD bit demand Agent adoption Compaction reduces need

DILIGENCE QUESTIONS & RESEARCH AGENDA

  1. Spec verification (External): OCP HBF v0.7.0 document. Capacity per stack (~512GB), bandwidth (~3 TB/s effective), interface details, power envelope.
  2. HBM4 comparators (External): ~36GB per HBM4 stack, HBM3E 1.2 TB/s (Micron), HBM4 bandwidth (Micron/Samsung).
  3. Latency and endurance (External): Quantify the "two orders of magnitude" read/program gap and endurance cycles for HBF-optimized dies. How does Sandisk trade retention and cost per bit for latency?
  4. Schedule (External): Sandisk's SEMICON Taiwan slide (late-2027 samples, 2029 HVM). Any SK hynix independent timeline.
  5. Customer pull (External): Which accelerators have committed (Google TPU? Tenstorrent? Merchant GPUs?). "Inputs from major AI players": who are they?
  6. Micron (External): Does Micron have an HBF or similar program? It isn't named in the consortium here.
  7. Samsung zNAND-O (External): Specs, and whether it's compatible with the OCP spec or a fork.
  8. Software ecosystem: Agrawal & Giduthuri (Hot Chips 2026) presentation, the "HBF Sucks?" paper (Peking/Fudan), HBF-aware scheduling in open-source serving stacks.
  9. Model trends (External): Kimi K3 2.8T params, the MoE share of frontier models, context-window norms (~1M) and KV-cache growth rates.
  10. KV-cache SSD offload (External): Evidence of inference-driven enterprise SSD demand in 2026, which is the near-term NAND channel.
  11. HBM economics (External): Incremental cost per GB and per TB/s across HBM3E → HBM4 → HBM4E. Does the SemiAnalysis dilution argument show up in pricing?
  12. Cross-memo: Reconcile with the Sep 14 Asianometry memo (memory session "packed," "500% stock booms," H2'27 compute glut). Does a glut raise or lower HBF adoption odds? Also label any Memo B "compute as moat" link as other desk memo.

RISK ANALYSIS

Thesis risk: HBF could repeat Optane: good cells, failed controller, software or go-to-market. HBM roadmaps could close the capacity gap. "Cheap capacity ≠ cheap tokens" could cap the use cases to niches.

Timing risk: "If all goes well" signals slippage risk. Memory products routinely slip. Nothing affects P&Ls before 2029 at the earliest. Equity narratives can front-run and then disappoint.

Execution / expression risk: Incumbents are hedged (SK hynix), so "HBF winner vs. HBM loser" pairs are impure. Sandisk is the cleanest proponent, but its near-term results are driven by NAND pricing and SSD demand, not HBF. The equity read needs External financials, and none were pulled.

External / identification risk: Clean captions, but spec numbers are narrated, not verified. The SemiAnalysis quote is relayed via Irrational Analysis. The "Optane couldn't do what Intel claimed" line is anonymous. Micron's HBF status is unknown.

Source-influence risk: The idea was suggested by a Sandisk employee. The skeptical sections mitigate, but don't eliminate, the framing bias.

Process risk: Don't import Sep 14 memo figures without labels. Don't email, publish, forward or message.


APPENDIX A — KEY NUMBERS (SOURCE-ATTRIBUTED; UNVERIFIED)

Item Narrated Timestamp Caveat
Kimi K3 2.8T params (~2.8TB at 8-bit) 03:00 External
Kimi K2.7 / DeepSeek V3 ~1TB / 671GB 03:00 External
Context window ~1M tokens (~1,500–3,000 pages; audio 11–12h; ~1h HD video) 04:00 Approximate
HBM stack heights 4/8/12/16 core dies 05:00 —
Cell vs. stack bandwidth density ~20 TB/cm² vs. ~4 TB/cm² (20-high) 06:00 SemiAnalysis Q&A via Irrational
HBF capacity ~512GB per stack (8–16x) vs. ~36GB HBM4 08:00 Spec narration
HBF bandwidth Up to ~3 TB/s effective vs. HBM3E 1.2 TB/s; ~HBM4 08:30 Capacity-adjusted far lower
Latency gap ~2 orders of magnitude slower read/program 09:00 —
Endurance Several thousand cycles 09:30 —
Shoreline example 8× 24GB = 192GB → 6 HBF + 2 HBM = 3.12TB 14:30 Arithmetic consistent (6×512 + 2×24)
Dates 2019 paper; May 2024 patent; Feb 2025 unveiling; Jul 2025 board; Aug 2025 MoU; Aug 2026 OCP v0.7.0 10:00–12:30 External
Schedule Samples ~late 2027; HVM 2029 "if all goes well" 20:00 Sandisk slide
Optane partnership Intel–Micron 2015; Micron exit 17:30–18:00 Historical
Ilkbahar Optane tenure 5 years VP/GM 18:30 External

APPENDIX B — BRIEF CORRECTIONS, EXTERNAL CHECKS & FLAGS

Where the transcript disagrees with or adds to the brief / Monica's angle:

External checks needed: OCP spec; Sandisk roadmap slide; HBM4/HBM3E specs; Kimi K3 and other model sizes; Micron HBF status; Samsung zNAND-O; Agrawal & Giduthuri and "HBF Sucks?" papers; Ilkbahar bio; KV-cache SSD demand data; any equity data (prices and valuations), via TV/IBKR only.

Document control: Saved to /workspace/pm-memos/2026-09-27-asianometry-high-bandwidth-flash.md. Published to the desk library on 27 Sep 2026: https://andrepow.here.now/memos/asianometry-high-bandwidth-flash/. Not emailed, forwarded or messaged. No trades.


End of memo.

Desk copy · not a trade recommendation · Erica · 27 Sep 2026